1. Field of the Invention
The present invention relates to a semiconductor device having a plurality of laminated wiring layers, or multilayer wiring layers separated by insulating layers, and such an insulating film, as well as a manufacturing process for such a semiconductor device.
2. Description of the Related Art
As integration becomes more and more dense for a semiconductor large-scale integrated circuit (LSI), individual devices with dimensional accuracy of xc2xc xcexcm or less are now integrated near the surface of a Si substrate. An LSI exhibits its function only after its individual devices are connected by wiring. However, if wiring is detoured to avoid intersections in interconnections between the individual devices, interconnecting delay may be caused because area occupied by wiring or wiring length is increased. A technique has been commonly used for providing wiring on multiple layers by inserting insulating layers between wiring to prevent intersections and/or overlapping of wiring.
This concept of multilayer wiring is shown in FIG. 16. An insulating film 1631 is formed in a silicon substrate 161, and is formed with a contact hole 164 therein. A contact plug 164 is buried in the contact hole 164 to connect a device forming region 162 to a first wiring layer 1651. In addition, the first wiring layer 1651 is connected to a second wiring layer 1652 through a via plug 1661 filled in a via hole 1661 opened in the insulating film 1632. The second wiring layer 1652 is connected to a third wiring layer 1653 through a via plug 1662 filled in a via hole 1662 opened in the insulating film 1633. Further multilayer wiring can be attained by sequentially repeating the process described above. The process is completed by covering the last wiring layer with a sealing film 167.
This technique for multilayer wiring with thin insulating layers therebetween has a large stray capacity causing interconnecting delay. When a signal containing high frequency components is transmitted through two vertically adjacent wiring layers having an inter-layer insulating film therebetween, crosstalk is generated, thereby causing erroneous operation. To prevent interconnecting delay or crosstalk, it is sufficient to increase the distance between the upper and lower wiring, or to thicken the inter-layer insulating film. However, thickening the inter-layer insulating film makes it necessary to form a deep, contact hole or via hole. Formation of a deep contact hole or via hole makes it further difficult to perform the dry etching technology for forming these holes. Thus, it is desirable to have the thinnest inter-layer insulating film as possible. The semiconductor integrated circuit technology for 256 megabit DRAM (Dynamic Random Access Memory) or thereafter requires a smaller contact hole diameter of xc2xc xcexcm or less. However, if it is desired to hold a ratio of the depth of a contact hole to its diameter, or an aspect ratio, up to five from the viewpoint of the dry etching technology, the thickness of the inter-layer insulating film is necessarily required to be 1 xcexcm or less. While the problem on the stray capacity between the upper and lower wiring layers is addressed in the above, an increase of stray capacity is also serious between wiring formed on a same plane. It is because, as the semiconductor integrated circuit is miniaturized, thickness of wiring and distance between wiring are also miniaturized, necessarily leading to the same problem as in the wiring thickness of xc2xc xcexcm. Since the wiring spacing cannot be widened in view of the requirement for a high degree of integration, the problem on interconnecting delay or crosstalk is more serious between wiring disposed on the same layer than between the upper and lower wiring for which the inter-layer insulating film may potentially be thickened.
To accurately determine interconnecting delay and crosstalk accompanying an increase of inter-wiring capacity determined by the thickness of the upper and lower inter-layer insulating film or the inter-layer insulating film in the same plane, it is necessary to handle it as a distributed constant circuit. FIG, 14 shows the capacity per unit wiring length between a wiring layer insulated by a silicon oxide film with a thickness H (dielectric constant: 3.9) and wiring on a silicon substrate, which is described by L. M. Dang, et al. in xe2x80x9cIEEE Electron Device Letters,xe2x80x9d Vol. EDL-2, 1981, p. 196. It shows that, as wiring width W decreases, capacity C significantly increases by a so-called fringe effect when compared with the so-called plane parallel plate approximated capacity. It is also known that the higher wiring height T is, the larger capacity C is. Although the insulating film between the silicon substrate and the lowermost wiring as shown in FIG. 14 is not usually called an inter-layer insulating film, it is common in the problems of interconnecting delay and crosstalk. Thus, the inter-layer insulating film referred to in this specification includes an insulating film contacting the silicon substrate and performing electric insulation with the wiring as well. In addition, FIG. 15 described in the above-referenced paper shows that, as wiring spacing is miniaturized, the total capacity Cf with the silicon substrate per unit length increases as further miniaturization is attained and when W/H is more than 1. This results because, although the capacity C11 between the wiring and the silicon substrate decreases, the capacity C12 between adjacent wiring separated by wiring spacing S contrarily increases. That is, although operating speed can be increased for individual elements of a semiconductor integrated circuit through miniaturization, wiring resistance and stray capacity increases in the wiring interconnecting these elements by miniaturization. Consequently, the operating speed for the entire LSI is not improved at all. Both of FIGS. 14 and 15 show results of analysis on the stray capacity between the silicon substrate and the wiring disposed through an insulating film, however, they do not address the stray capacity between the wiring layers, even though the situation is the same for the stray capacity between the wiring layers.
Thus, it is an urgent necessity, in light of the foregoing discussion, to develop an inter-layer insulating film with a low dielectric constant xcex5r in place of Si3N4 (xcex5r: 7 or less) and silicon oxide (xcex5r: 3.9 or less) which are insulating films commonly used in the LSI technology. An amorphous carbon fluoride film with a dielectric constant xcex5r less than 3 is disclosed in Japanese Patent Application Laid-Open Nos. 08-83842, 08-222557, 08-236517 and the like is expected as a suitable material with a low dielectric constant xcex5r.
As described above, since the amorphous carbon fluoride film has a low dielectric constant xcex5r, it is expected to be suitable as an inter-layer insulating film in multilayer wiring. However, there are still problems in the technology of forming a contact hole contacting a semiconductor diffusion layer or a via hole for connecting wiring layers, which prevent it from being put in practical use. The inventors tried to open a hole in an amorphous carbon fluoride by referring to the description in Japanese Patent Application Laid-Open No. 5-74962 which is directed to an inter-layer insulating film which is believed to be a film similar to the amorphous carbon fluoride disclosed in Japanese Patent Application Laid-Open Nos. 08-83842, 08-222557, 08-236517. Japanese Patent Application Laid-Open No. 5-74962 shows that conventional photolithography technology can be used, thus the process is to use conventional resist which is a mixture of phenol resin and photosensitive agent or a resin such as cyclized rubber and photosensitive resin, to apply it on an amorphous carbon fluoride film in a thickness of 1-1.5 xcexcm, and to open a hole with a diameter of 0.2 xcexcm by assuming a highly integrated LSI of 64 megabit or higher DRAM. The film disclosed in Japanese Patent Application Laid-Open No. 5-74962 has a problem because it contains a large amount of hydrogen, and is poor in thermal resistance which is a requirement for the inter-layer film.
It is desired to realize the structure as shown in FIG. 16 utilizing an amorphous carbon fluoride as an inter-layer insulating film. A technique is described for opening a contact hole 164, or a via hole 1661 or 1662 in the amorphous carbon fluoride inter-layer insulating films. First, the conventional resist described above is applied on the amorphous carbon fluoride, followed by exposure and development to form a selection mask for etching. Subsequently, a hole is opened in the amorphous carbon fluoride by an ion milling process with this resist film as a mask. A hole opening by the ion milling is adopted because the amorphous carbon fluoride film is strong against ordinary acid or alkali, and cannot be strongly etched. However, since the hole is opened by ion milling, which is a substantially pure physical process, the resist as the mask itself, is ground in the course of hole opening in the amorphous carbon fluoride. Thus, the hole can be hardly opened in the amorphous carbon fluoride with a film thickness less than 0.4 xcexcm by forming the resist in a thickness of 1 xcexcm or more. However, it is very difficult to open a hole in a film with a thickness of 0.4 xcexcm or more by the ion milling process.
After opening the hole with the ion milling process, the resist is removed. It is found that film reduction is caused in the amorphous carbon fluoride by wet treatment using resist remover heated to about 100xc2x0 C. It was further tried to remove the resist with an ashing process in oxygen plasma. However, it is found that even this process rapidly removes the amorphous carbon fluoride together with the resist. That is, it is very difficult to selectively work the amorphous carbon fluoride film with the conventional photolithography technology.
Japanese Patent Application Laid-Open No. 09-246242 discloses a technology to break such a situation, and shows that it is sufficient to use a silicone type resist as a mask for selective etching of the inter-layer insulating film containing the amorphous carbon fluoride film. This is because the silicone type resist is hot etched by oxygen plasma. In addition, an arrangement is adopted, in which a silicon oxide film, silicon nitride film, or silicon oxi-nitride film, which is a mixed film of both, is disposed on at least one principle plane of the amorphous carbon fluoride film. It is shown to be effective in improving adhesion near the inter-layer insulating film particularly when the stoichiometric ratio of the interface contacting at least the amorphous carbon fluoride of the silicon oxide film, silicon nitride film, or silicon oxi-nitride film is made silicon excess. In addition, it is shown that, if the silicon oxide film, silicon nitride film, or silicon oxi-nitride film is disposed on the sectional region of the amorphous carbon fluoride film exposed to the side wall of a hole formed to pass through the insulating film containing the amorphous carbon fluoride film, then the degree of freedom can be significantly increased for the conditions in forming a conductive plug. The conductive plug is subsequently buried in the hole, whereby a semiconductor device having a conductive plug with low specific resistance can be obtained. It is also shown that adhesion of the conductive plug is also improved if the silicon oxide film, silicon nitride film, or silicon oxi-nitride film is silicon excess in the composition of the film adjacent to the amorphous carbon fluoride film.
It is also described that, if an oxide film, nitride film, or oxi-nitride film providing improvement of adhesion to the top surface of the amorphous carbon fluoride film is disposed on an insulating layer containing the amorphous carbon fluoride film, the surface of amorphous carbon fluoride film which has been unevened due to burying of a wiring layer or the like can be flattened in good reproducibility with chemical mechanical polishing by detecting the oxide film, nitride film or oxi-nitride film existing in the recessed portion for completion of polishing.
As described above, Japanese Patent Application No. 09-246242 shows that processing of the amorphous carbon fluoride film becomes possible by silicone resist. However, since the silicone resist is not common, and is negative resist, there is a problem that it is not a good compatible with the current LSI process technology mainly using positive resist. The reason why the positive resist is mainly used in the LSI process lies in that, as well known, it provides higher processing accuracy than the negative resist. Although sufficient processing accuracy has been obtained on the laboratory level even with the silicone type resist, to introduce the amorphous carbon fluoride film in an actual LSI manufacturing line, it is necessary to build a process constituted by positive resist which is a mixture of phenol resin and photosensitive resin or a resin such as cyclized rubber and photosensitive resin.
Furthermore, in the flattening process by the chemical mechanical polishing, although there is no problem in the laboratory level, it is found to be difficult to make the process as stable as in polishing a conventional film such as silicon oxide film.
Here, the object of the present invention is to provide a technology for selectively forming a contact hole or via hole when an amorphous carbon fluoride film is applied on an inter-layer insulating film with low dielectric constant xcex5r. Such a technology is effective for solving the problems of interconnecting delay or crosstalk, burying wiring, and a practical LSI process using conventional positive resist similar to that described mainly on the technology for flattening the inter-layer insulating film in Japanese Patent Application Laid-Open No. 5-74962. However, the present invention also applies to not only an LSI chip having a multilayer wiring structure, but also a device in which a number of LSI chips are mounted on a substrate, such as a multi-chip module.
The present invention improves adhesion with another material by making one principle plane an amorphous carbon fluoride film coated with a DLC (diamond like carbon) film containing hydrogen to prevent fluorine in the amorphous carbon fluoride film from being emitted outside, and by removing fluorine in a surface contacting another material. The addition of hydrogen provides the following effects:
When the amorphous carbon fluoride film is applied to an LSI, it is effective to use a DLC film containing hydrogen in at least one of its primary planes, and an amorphous carbon fluoride film coated with at least one layer of film selected from a silicon excess silicon oxide film, silicon nitride film, or silicon oxi-nitride film. In this case, adhesion with another material is significantly improved by adjusting the supply of gas of the chemical vapor deposition (CVD) process to deposit a silicon excess silicon oxide film, silicon nitride film, or silicon oxi-nitride film, which is a mixed film of both (hereinafter comprehensively called xe2x80x9csilicon excess filmxe2x80x9d). The CVD process for the silicon excess film uses an approach to mix gas containing silicon, such as silane (SiH4), and gas containing oxygen or nitrogen, such as O2, nitrogen monoxide (NO) or ammonia (NH3). In an adhesion layer consisting of the DLC film containing hydrogen and the silicon excess film, carbons, a DLC component element, are terminated by rich silicon and hydrogen in the silicon excess film, and are bound to provide enhancement of adhesion.
In particular, adhesion with another material is significantly high for an amorphous carbon fluoride film which has an adhesion layer with a transition layer in which at least carbon and silicon mix in the interface between a DLC film containing hydrogen, and at least one layer of silicon excess film.
Formation of such adhesion layer first enables it to implement, on a practical level, a semiconductor device in which at least part of insulating material is constituted by an amorphous carbon fluoride.
In particular, if an amorphous carbon fluoride film with an adhesion layer as described above is applied to at least a part of the inter-layer insulating film in a multilayer wiring structure, it is possible to implement a semiconductor device with sufficiently high process reliability and small wiring or inter-wiring layer capacity.
In addition, in such case, a semiconductor device with small wiring or inter-wiring capacity can be implemented with a high degree of freedom as if a conventional silicon oxide film is used, by at least locally disposing an insulating layer containing at least an amorphous carbon fluoride film on each surface of which at least one layer of silicon excess film, and an insulating film consisting of a DLC film are disposed (such composite film being called a low dielectric constant inter-layer insulating film).
In such case, it is not necessary to attain insulation only with the low dielectric constant inter-layer insulating film. In some cases, a semiconductor device with a low inter-wiring layer capacity may be sufficiently implemented by using it on at least a part of the inter-layer insulating film. Particularly, if the wiring layers are separated by a composite insulating film at least consisting of a low dielectric constant insulating film and at least one layer of silicon type insulating film selected from a silicon oxide film or silicon nitride film, or silicon oxi-nitride film. As such, it is possible to obtain a structure as a semiconductor device which can assure insulation between the wiring layers using a silicon type insulating film which has exhibited good showing in the LSI, and can be sufficiently manufactured on the existing manufacturing process.
In particular, the existing polishing technology can be used to produce a inter-wiring layer insulating film in which a low dielectric constant inter-layer insulating film is arranged to coat an under layer wiring layer close to the silicon substrate. Further, the surface layer is substantially flat on a composite insulating film consisting of at least one layer of insulating film (called flattened insulating film), which is selected from a silicon oxide film, silicon nitride film, or silicon oxi-nitride film, to coat the low dielectric constant inter-layer insulating film, whereby a semiconductor device sufficiently accommodating miniaturization can be provided.
The present invention enables a DLC film or amorphous carbon fluoride film to be selectively etched in an oxygen plasma using the flattened insulating film as a mask, so that a manufacturing process for semiconductor device can be attained by processing with positive resist. Especially, in etching the DLC film or amorphous carbon fluoride film in the oxygen plasma, it is possible to reduce side etching as low as possible by applying high frequency bias power of 200 W or more to an electrode on which an etched wafer is disposed.
Since the flattened insulating film serves as the hard mask after the steps of: forming a low dielectric constant inter-layer insulating film coating an under layer wiring layer close to a silicon substrate, forming at least one layer of flattened insulating film selected from a silicon oxide film or silicon nitride film, or silicon oxi-nitride film, and polishing the surface of the flattened insulating film, it would be possible to implement a semiconductor device having inter-layer insulating film with low dielectric constant characteristics without particular increase of the number of processes.
Etching controllability for a via hole or the like is very high because it possible to easily attain the step of etching a silicon oxide film or silicon nitride film, or silicon oxi-nitride film with a DLC film or amorphous carbon fluoride film as an etching stopper, or conversely, the step of etching a DLC film or amorphous carbon fluoride film with a silicon oxide film or silicon nitride film, or silicon oxi-nitride film as an etching stopper.
While an amorphous carbon fluoride film is described herein, diffraction lines may be observed through X-ray diffraction experiment or the like. However, they do not impair characteristics such as dielectric constant characteristics. Thus, there may locally exist microcrystals, but they are inclusively called herein, the amorphous carbon fluoride.